資料介紹
MM54HC534/MM74HC534
TRI-STATEé Octal D-Type Flip-Flop
with Inverted Outputs
General Description
These high speed Octal D-Type Flip-Flops utilize advanced
silicon-gate CMOS technology. They possess the high noise
immunity and low power consumption of standard CMOS
integrated circuits, as well as the ability to drive 15 LS-TTL
loads. Due to the large output drive capability and the TRISTATE
feature, these devices are ideally suited for interfacing
with bus lines in a bus organized system.
These devices are positive edge triggered flip-flops. Data at
the D inputs, meeting the setup and hold time requirements,
are inverted and transferred to the Q outputs on positive
going transitions of the CLOCK (CK) input. When a high
logic level is applied to the OUTPUT CONTROL (OC) input,
all outputs go to a high impedance state, regardless of what
signals are present at the other inputs and the state of the
storage elements.
The 54HC/74HC logic family is speed, function, and pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to VCC and ground.
Features
Y Typical propagation delay: 23 ns
Y Wide operating voltage range: 2±6V
Y Low input current: 1 mA maximum
Y Low quiescent current: 80 mA maximum
Y Compatible with bus-oriented systems
Y Output drive capability: 15 LS-TTL loads
TRI-STATEé Octal D-Type Flip-Flop
with Inverted Outputs
General Description
These high speed Octal D-Type Flip-Flops utilize advanced
silicon-gate CMOS technology. They possess the high noise
immunity and low power consumption of standard CMOS
integrated circuits, as well as the ability to drive 15 LS-TTL
loads. Due to the large output drive capability and the TRISTATE
feature, these devices are ideally suited for interfacing
with bus lines in a bus organized system.
These devices are positive edge triggered flip-flops. Data at
the D inputs, meeting the setup and hold time requirements,
are inverted and transferred to the Q outputs on positive
going transitions of the CLOCK (CK) input. When a high
logic level is applied to the OUTPUT CONTROL (OC) input,
all outputs go to a high impedance state, regardless of what
signals are present at the other inputs and the state of the
storage elements.
The 54HC/74HC logic family is speed, function, and pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to VCC and ground.
Features
Y Typical propagation delay: 23 ns
Y Wide operating voltage range: 2±6V
Y Low input current: 1 mA maximum
Y Low quiescent current: 80 mA maximum
Y Compatible with bus-oriented systems
Y Output drive capability: 15 LS-TTL loads
74HC5
加入交流群
掃碼添加小助手
加入工程師交流群
下載該資料的人也在下載
下載該資料的人還在閱讀
更多 >
- HD74HC374 HD74HC534 數(shù)據(jù)表
- HD74HC374 HD74HC534 數(shù)據(jù)表
- 74HC534英文手冊(cè) 1次下載
- 74HC534 英版數(shù)據(jù)手冊(cè) 0次下載
- CD54HC534,CD74HC534,CD54HCT534
- TC74HC240,TC74HC244/TC74HC241
- 74HC4040 pdf datasheet
- 74HC4050 pdf datasheet
- 74HC4049 pdf datasheet
- 74HC540 pdf datasheet
- 74HC367 pdf datasheet
- 74HC366 pdf datasheet
- 74HC356 pdf datasheet
- 74HC161 pdf datasheet
- 74HC74A pdf datasheet
- 探索CD54HC221、CD74HC221和CD74HCT221:高速CMOS雙單穩(wěn)態(tài)多諧振蕩器的技術(shù)剖析 529次閱讀
- 高速CMOS邏輯雙單穩(wěn)態(tài)多諧振蕩器:CD54HC221、CD74HC221和CD74HCT221 442次閱讀
- 高速CMOS邏輯雙單穩(wěn)態(tài)多諧振蕩器CD54HC221、CD74HC221和CD74HCT221的設(shè)計(jì)指南 218次閱讀
- 高速CMOS邏輯雙可重觸發(fā)單穩(wěn)態(tài)多諧振蕩器:CD54/74HC123、CD54/74HCT123、CD74HC423、CD74HCT423 564次閱讀
- 74hc573怎么使用 74hc573可以仿真嗎 1.8w次閱讀
- 74HC154的簡(jiǎn)單介紹 74hc154應(yīng)用電路圖分析 2.5w次閱讀
- 74ls04和74hc04有什么區(qū)別_74ls04/74hc04簡(jiǎn)介 3w次閱讀
- 電源芯片74HC4953引腳功能(74HC4953內(nèi)部結(jié)構(gòu)及封裝) 5.2w次閱讀
- 74hc165級(jí)聯(lián)用法(74hc165級(jí)聯(lián)電路圖及程序) 5.6w次閱讀
- 74hc165使用方法(74hc165功能_內(nèi)部結(jié)構(gòu)圖_時(shí)序圖) 5.7w次閱讀
- 74hc165中文資料詳細(xì)(74hc165工作原理_引腳圖及功能_應(yīng)用電路_邏輯圖) 21.4w次閱讀
- 基于74HC138的簡(jiǎn)單解析 1.6w次閱讀
- 74hc165和74hc164有何不同_74hc165和74hc164區(qū)別 3.5w次閱讀
- 74HC04和74HC14的具體區(qū)別詳解 9.7w次閱讀
- 74hc138和74ls138的區(qū)別 5w次閱讀
下載排行
本周
- 1納祥科技NX9020中文規(guī)格書,114 dB CODEC,國(guó)產(chǎn)替代CS4272
- 440.34 KB | 2次下載 | 免費(fèi)
- 2IP5356H_G3?支持高壓SCP/PD3.0等全協(xié)議并集成USB2.0智能監(jiān)測(cè)的移動(dòng)電源 SOC
- 2.75 MB | 2次下載 | 免費(fèi)
- 3 斯丹電子 | 磁傳感技術(shù)在數(shù)據(jù)中心市場(chǎng)應(yīng)用
- 614.56 KB | 2次下載 | 免費(fèi)
- 4NJM2606AD 低壓直流電機(jī)控制器英文資料
- 0.15 MB | 次下載 | 免費(fèi)
- 5YD52EL-V1-EDP轉(zhuǎn)LVDS使用手冊(cè)
- 1.10 MB | 次下載 | 1 積分
- 6YD53HV-V1產(chǎn)品使用手冊(cè)
- 1.17 MB | 次下載 | 1 積分
- 7矽力杰 Silergy SY8401 異步降壓調(diào)節(jié)器 規(guī)格書 Datasheet 佰祥電子
- 848.10 KB | 次下載 | 免費(fèi)
- 8矽力杰 Silergy SY8492 異步降壓調(diào)節(jié)器 規(guī)格書 Datasheet 佰祥電子
- 787.44 KB | 次下載 | 免費(fèi)
本月
- 1EMC PCB設(shè)計(jì)總結(jié)
- 0.33 MB | 12次下載 | 免費(fèi)
- 2矽力杰 Silergy SY7215A 同步升壓調(diào)節(jié)器 規(guī)格書 Datasheet 佰祥電子
- 1.12 MB | 5次下載 | 免費(fèi)
- 3SY50655 用于高輸入電壓應(yīng)用的偽固定頻率SSR反激式穩(wěn)壓器英文資料
- 1.01 MB | 3次下載 | 免費(fèi)
- 4納祥科技NX9020中文規(guī)格書,114 dB CODEC,國(guó)產(chǎn)替代CS4272
- 440.34 KB | 2次下載 | 免費(fèi)
- 5怎么為半導(dǎo)體測(cè)試儀選擇精密放大器
- 0.65 MB | 2次下載 | 免費(fèi)
- 6SY52341 次級(jí)側(cè)同步整流英文手冊(cè)
- 0.94 MB | 2次下載 | 免費(fèi)
- 7華潤(rùn)微 CRTE280P06L2-G -60V Trench P-MOSFET 技術(shù)參數(shù)與應(yīng)用解析
- 1.83 MB | 2次下載 | 免費(fèi)
- 8 斯丹電子 | 磁傳感技術(shù)在數(shù)據(jù)中心市場(chǎng)應(yīng)用
- 614.56 KB | 2次下載 | 免費(fèi)
總榜
- 1matlab軟件下載入口
- 未知 | 935137次下載 | 10 積分
- 2開(kāi)源硬件-PMP21529.1-4 開(kāi)關(guān)降壓/升壓雙向直流/直流轉(zhuǎn)換器 PCB layout 設(shè)計(jì)
- 1.48MB | 420064次下載 | 10 積分
- 3Altium DXP2002下載入口
- 未知 | 233095次下載 | 10 積分
- 4電路仿真軟件multisim 10.0免費(fèi)下載
- 340992 | 191469次下載 | 10 積分
- 5十天學(xué)會(huì)AVR單片機(jī)與C語(yǔ)言視頻教程 下載
- 158M | 183360次下載 | 10 積分
- 6labview8.5下載
- 未知 | 81606次下載 | 10 積分
- 7Keil工具M(jìn)DK-Arm免費(fèi)下載
- 0.02 MB | 73832次下載 | 10 積分
- 8LabVIEW 8.6下載
- 未知 | 65991次下載 | 10 積分
電子發(fā)燒友App





創(chuàng)作
發(fā)文章
發(fā)帖
提問(wèn)
發(fā)資料
發(fā)視頻
上傳資料賺積分
評(píng)論